In the production process of PCB circuit board, the surface of the "core board" is coated or laminated with a dielectric layer (or resin-coated copper foil) and formed with micro-vias. These micro vias formed by layering on the "core board" are based on methods such as photoinduced, plasma, laser, and sandblasting methods (mechanical methods, including unintroduced numerical control drilling methods, etc.) What are the characteristics and requirements for pore formation and electroplating? Let's understand it together.
For through holes, if it is a vertical hole plating, the PCB manufacturer can make the PCB on the two boards of the board by swinging, vibrating, stirring the plating solution or spraying in the board making fixture (or hanger). There is a hydraulic difference between them. This hydraulic difference will force the plating solution into the hole and drive away the gas in the hole to fill the hole. For high aspect ratio (thickness-to-diameter ratio: the ratio of the thickness of the dielectric layer to the aperture of the micro-via) The existence of this hydraulic pressure difference is even more important, and then pore formation or electroplating is carried out. During pore electroplating, some Cu2+ ions in the plating solution in the hole must be consumed. Therefore, the Cu2+ concentration in the plating solution in the hole becomes lower and lower, and the efficiency of pore or electroplating will become smaller and smaller. Coupled with the effect of the plating fluid in the through holes (such as "laminar flow" phenomenon, etc.) and the uneven current density distribution (the electric current density in the hole is much lower than the current density on the plate surface), therefore, the center of the hole The thickness of the coating is always lower than the thickness of the coating at the board surface.
In order to reduce this difference in coating thickness, the most fundamental method is: First, increase the flow of the plating solution in the hole or the number of exchanges of the plating solution in the hole per unit time (assuming that the plating solution is changed again and again, in fact, it is necessary It is much more complicated, but this assumption can explain the problem); the second is to increase the current density in the hole, which is obviously difficult, or it is not feasible, because it is bound to increase the current density of the plating solution in the hole. It is necessary to increase the current density of the board. This will cause a greater difference between the thickness of the plating layer in the center of the hole and the thickness of the plating layer on the board; the third is to reduce the current density during electroplating and the concentration of Cu2+ ions in the plating solution. At the same time, improve the smooth flow of the plating solution in the hole (or the number of plating solution exchanges), in this way, can reduce the difference of Cu2+ ion concentration in the plating solution between the plate surface and the hole (referring to the difference between the department's consumption of Cu2+ and the replacement of the plating solution The difference in Cu2+ concentration caused by this method is to improve the difference between the thickness of the plating layer on the board and the plating layer in the hole (in the center), but it is often at the expense of the PCB yield (yield). People do not want; fourth is to use pulse plating method, according to the different high aspect ratio of the micro vias, the corresponding pulse current plating method {can significantly improve the PCB board surface plating and the thickness of the plating layer in the hole The difference can even reach the same plating thickness. Can these measures be used for the hole plating of micro-vias in multi-layer PCB circuit boards?
As mentioned earlier, the pore plating of micro-vias in multilayer circuit boards is carried out in blind holes. When the depth of the blind holes is small or the ratio of thickness to diameter is small, practice has shown that the above four types of electroplating The measures can get good results. However, when the depth of the blind hole is high or the aspect ratio is large, what is the reliability of the microvia plating? In other words, how to control the depth of the blind hole or the appropriate degree of the thickness to diameter ratio of the multilayer circuit board?
As for the use of horizontal hole plating to process micro-vias in multi-layer PCBs, there are no specific reports, but people can imagine that horizontal hole plating is used when the thickness-to-diameter ratio of the PCB is not large. Reliable electrical interconnection should be available. For blind vias with a larger aspect ratio, the blind vias on the lower surface of the multilayer circuit board are difficult to drive off the gas in the hole, and it is even difficult for the plating solution to enter the hole, let alone The plating solution is exchanged in the hole unless the plate surface is turned over on schedule.
